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JTAG debug tool goes serial

Jul 30, 2007 — by LinuxDevices Staff — from the LinuxDevices Archive

Hardware debug tools specialist American Arium has revised its popular HS-1000 emulating “trace port analyzer” to handle “serial wire debug” (SWD) embodied in ARM Cortex processor cores. SWD, on the new HS-1000S debug tool, supplants 5-wire JTAG with 2-wire serial access, while reducing bill-of-material costs, according to… the company.

(Click here for a larger image of the HS-1000S)

According to Arium, the HS-1000S delivers reliable run control and also supports ARM Ltd's ETM (embedded trace macrocell) technology, “leading the industry with a 256 MByte buffer and a blazing 680 MS/s capture rate.” In addition to ARM, the HS-1000S supports XScale and TI-OMAP core architectures. The compact unit measures 5.25 x 5.5 x 1.63 inches.

Key features of the new HS-1000S debug tool are said to include:

  • Supports ARM Cortex R4 and M3 cores as well as ARM7, ARM9, and ARM11 devices
  • Cortex cores are accessed via a DAP (debug access port) that is part of the new ARM debug paradigm

Supported toolchains include:

  • ARM Development Suite 1.2
  • ARM RealView Developer Suite
  • GNU C/C++
  • Green Hills C/C++
  • IAR Embedded Workbench

Serial wire debug (SWD)

According to Arium CEO Larry Traylor, “serial wire debug is an ARM CoreSight JTAG replacement that uses two wires instead of the five required by JTAG debug. Our customers need SWD as various ARM licensees are adopting the new technology.”

SWD provides a debug port for packages with limited pins, such as microcontrollers and complex ASICs where pin count adversely affects device cost in embedded applications, explains Arium. The two wires include a clock pin and bi-directional data pin, providing all normal JTAG debug and test functionality, plus real-time access to system memory without halting the core or requiring any target resident code, according to ARM.

Other key features of SWD include:

  • Enables the debugger to become another AMBA (advanced microprocessor bus architecture) bus master for access to system memory and peripheral or debug registers
  • Offers high performance data rates of up to 640KB/sec at 8 MHz
  • Requires no extra power or ground pins
  • Silicon overhead is a small 2.5K additional gates

SourcePoint debugger

The HS-1000S is used in conjunction with Arium's SourcePoint debugger software. A series of intuitive screens (screenshot below) and dialogs with numerous viewing and customization options eases use, according to the company. The debugger and the HS-1000S operate in real time with all core frequencies. Additionally, SourcePoint supports “industry-standard debug file formats” and includes a “C-like command language.”


SourcePoint debugger screenshot
(Click to enlarge)

Versions of SourcePoint are available for PC workstations running either Linux (various distributions) or Windows 2000/XP/Vista. Target debug is OS agnostic, and doesn't require a target OS.

Availability

The HS-1000S is shipping now, priced at $9,500, the company said.


 
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